Vhdl code for 3 bit up counter

You set zint to "" on reset. Then, as long as zint is less equal "" you set it to "" again. How can zint become different from ""?

You could drop the first if condition completely, the counter will automatically overflow from "" to "" or vice versa. In fact, you don't need the above line at all - the counter will automatically wrap-round. And, the same is true for counting down, a situation you have no code for, anyway.

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Welcome to Stack Overflow. Usually it is better to give an MCVE so that someone else can reproduce your fault, but in this case I think I can see what is wrong.

3-bit synchronous counter - VHDL - Tek-Tips

Please indent your code. Please show your testbench.

VHDL program to count upto 10 in 4 bit up counter? - Stack Overflow

What do you mean by do not give any output result? I think this line is your problem: Having said that, here are some other suggestions to improve your code: ALL; -- use ieee. USE THIS INSTEAD entity counter is Port rst,clk: Matthew Taylor 4, 2 4 Sign up or log in StackExchange.

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VHDL Code for 4-bit binary counter

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